Meta Runs Google’s AI Chips in Live Production, Challenging Nvidia’s Grip

The long-standing dominance of Nvidia in artificial intelligence infrastructure faces its most direct software-driven challenge yet. Google’s custom Tensor Processing Units, long confined to its own ecosystem, are now running in live production at Meta. This development signals a break from the industry’s reliance on a single hardware standard and marks the first time these specialized chips have been sold to an external customer for a major production workload. The move creates immediate tension in the market, suggesting that the software barriers that once protected Nvidia’s position are crumbling.

First, the technical hurdle of framework incompatibility has been removed. Previously, running PyTorch models on Google TPUs required using the JAX framework or an older bridge called PyTorch/XLA. Google has now released native versions of the SGLang and vLLM inference engines that work directly with PyTorch. Meta’s PyTorch-TPU lead, Zongwei Zhou, confirmed that this setup is live. He described the result as a remarkably mature serving stack that was built through close collaboration between Meta, Google, and the startup RadixArk, which created the original SGLang engine.

Second, Meta explicitly seeks to avoid being locked into a single hardware architecture. Jana van Greunen, director of PyTorch engineering at Meta, stated that the company cannot be constrained by one design. By adopting the new TorchTPU backend, Meta can now deploy its existing PyTorch workloads onto Google’s hardware. This flexibility was a primary goal of the partnership, as Meta previously preferred to stay within the PyTorch ecosystem rather than migrate to Google’s native JAX tools. The new system allows for a seamless transition without requiring extensive code rewrites.

Third, the performance metrics suggest that Google’s hardware is competitive with Nvidia’s latest offerings. Tests conducted by Inferact, a startup involved in building the new vLLM support, showed that a tuned setup on the seventh-generation Ironwood TPU could exceed 700 tokens per second for a single user. This benchmark was tested against a setup using 16 Nvidia GB200 chips, which reached 452 tokens per second. The new kernels also demonstrated higher throughput at small batch sizes for specific open-weight models, indicating that the efficiency gap between the two platforms is narrowing.

Contextually, this announcement follows closely on the heels of similar moves by other tech giants. Just one day before Google’s release, Amazon announced it was open-sourcing its own native PyTorch backend for its Trainium chips. Both companies appear to be targeting Nvidia’s software lock-in, a strategy that has historically kept developers tied to CUDA. For Meta, this is not its first attempt at using TPUs, as research teams used them via an older bridge between 2020 and 2023 before canceling those contracts. However, the current integration is far deeper and intended for production scale.

The outlook for this partnership includes expanded model support and faster release cycles. The SGLang team plans to add support for DeepSeek V4.1 Flash and other models soon. They are also working toward Day 0 support for new open models by the first quarter of 2027, ensuring that new releases are immediately compatible with the hardware. Google, Meta, and RadixArk plan to share further details at the SGLang Summit in San Francisco in November. For New England businesses and tech hubs, this shift suggests a more competitive and flexible market for AI infrastructure, potentially lowering costs and offering more options for deploying large language models.